Design of 0.12um CMOS device using TCAD statistical simulation

摘要

We have designed 0.12μm CMOS devices using TCAD statistical simulation. To assure Iddq(Idd quiescent current) test which is indispensable for LSJ reliability, the maximum Ioff currents of 4e-10A/μm is determined. Three transistors with same Ioff currents but different roll-off characteristics are evaluated for the LSI operation frequency in consideration of process variation. The transistor with a large roll-off characteristics is superior to that with a small roll-off characteristics.