In the paper a new hardware architecture for the implementation ofa high-speed, low bit-rate image coding system is outlined. Ourproposed algorithm is based on the Cellular Neural/Nonlinear Network(CNN) chip-set. A simple and fast method is introduced to generatebasis functions of two-dimensional (2D) orthogonal transformations.Using these 2D basis functions of the Hadamard or cosine functions,the transformation coefficients of the basic blocks of the image aremeasured by the CNN. Meanwhile, the CNN can produce the inversetransformation of the measured coefficients and the actual distortionrate can be computed. If a required distortion rate is reached, thecoding process could be stopped (the use of even more coefficientswould increase bit-rate needlessly). Effects of noise and VLSIcomputing accuracy are also considered to optimize the architecture.Copyright
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