Silicon-on-insulator (SOI) technology, more specifically silicon on sapphire (SOS), was initially envisioned for the niche of radiation-hard circuits. In the last 20 years, a variety of SOI structures have been conceived with the aim ofdielectrically separating, using a buried oxide (BOX) (Fig. 1), the active device volume from the detrimental, parasitic influence of the silicon substrate 1. More recently, the advent of new SOI materials (UNIBOND, ITOX, Eltran) together with theexplosive growth of interest in portable microelectronics have focussed considerable attention on SOI for the fabrication of low-power, low-voltage, and high-frequency CMOS circuits. Several major companies (IBM, Sharp, Motorola) have recently announcedtheir intent to commercially develop "SOI-enhanced" microprocessors and mobile communication devices.The aim of this article is to give a flavor of the state-of-the-art SOI technology by discussing the synthesis of SOI wafers and the general interest of SOI circuits, the structure and performance of typical devices, and the operation modes of SOIMOSFETs. Critical questions related to the future of SOI are also raised. The article also addresses the challenges that SOI is facing in order to compete with bulk Si in the commercial arena.
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