Analysis of Cascaded Multilevel Inverter with a Reduced Number of Switches for Reduction of Total Harmonic Distortion

摘要

Multilevel inverters (MLI) are aligned with lower harmonics and less commutation losses, which offer high power capacity. MLI is one of the best widespread converters due to its ability to eliminate the harmonic distortion without dropping the converter power output. The cascaded MLI is utilized for a reduced number of switches. In this topology, the switching angles at fundamental frequency are attained by solving the selective harmonic eliminations using sine cosine algorithm. This attains the desired output voltage with the elimination of certain lower order harmonics. In this paper, the analysis of seven-level cascaded MLI is presented with the scheme of carrier-based modulation techniques i.e. Phase-Disposition (PD), Phase-Opposition Disposition (POD) and Alternative Phase-Opposition Disposition (APOD). The Artificial intelligence (AI) is carried out for PD technique. These techniques are capable of defining the required switching angles to eliminate the preferred values of harmonics. The harmonic contents of output voltage in carrier-based modulation are observed with the indices, such as the modulation index with frequency modulation index and amplitude modulation index. The simulation results are obtained for seven-level inverter using MATLAB/SIMULINK. The hardware implementation is carried out using Main Power Management IC TPS65217C Beagle Bone Black Board for seven-level open loop control to justify the achievement of the suggested topology.