Design and Analysis of Dual Output Three Level Inverter with Reduced Switch Count Topology

摘要

The multilevel inverter is widely used for medium voltage and high power applications. However, the application is limited due to the need for more number of switches, diodes and the system complexity. The proposed inverter is a hybrid topology with two-level and three-level diode clamped multilevel inverter structure with a reduced number of switches, diodes and gate driver circuits for dual output, which reduces system cost and complexity. In general, diode clamped multilevel inverter needs 24 switches to control dual output. In this paper, it was reduced as 15 switches and 12 switches by sharing of middle switches. The simulation was carried out by MATLAB Simulink and the hardware results were compared with simulation results. Also, modulation index, switching frequency and different topology with R, and RL loads were discussed and compared. The experimental plan was developed as per the Box–Behnken method and the experiments were carried out. The results were statistically analyzed and its significance was tested.