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A High-Efficiency Fast-Transient LDO With Low-Impedance Transient-Current Enhanced Buffer

机译:A High-Efficiency Fast-Transient LDO With Low-Impedance Transient-Current Enhanced Buffer

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摘要

This article proposes a new low-impedance transient-current enhanced (LTE) buffer, which is applied for low-dropout regulator (LDO) with large off-chip capacitor. The LTE buffer is based on current-shunt feedback technique and two ac coupling networks, which can achieve an extremely low output impedance and high charging/discharging current of the gate of power transistor at load transient response, while maintaining low-quiescent current consumption under the full-load range. In addition to containing the LTE buffer, the proposed LTE-LDO employs recycling-folded-cascode amplifier as the error amplifier, which has the advantage of high loop gain, loop bandwidth, and current efficiency. Meanwhile, simple Miller compensation with a nulling resistor is employed for frequency compensation and a complete small-signal analysis under different load current conditions is given in this article. This design has been implemented in semiconductor manufacturing international corporation 0.18 $mu$m complementary metal–oxide–semiconductor process and the experimental results show that the quiescent current consumption is about 48 $mu$A, and the maximum current efficiency of the LTE-LDO is 99.976$$. The measured transient response shows that under the condition of 1 $mu$F load capacitance, when the load current changes to 200 mA/100 ns, the output voltage change is 76 mV.

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