With specifically designed hardware, FPGA is a promising candidate for neural network inference acceleration. The main challenge FPGA-based accelerator designs are faced is the deficiency of on-chip resources. We consider using multi-FPGA to conquer this problem. However, even for multi-FPGA, insufficient resources and communication delays are still non-negligible problems. In this paper, we use the quantization method based on LQ-NET proposed by the Microsoft group to reduce resource usage and communication traffic. At the same time, the tradeoff of the accuracy can be achieved by increasing the bit width. The synthesis results of the first two layers of Alexnet indicate that both the BRAM usage and the performance are improved.
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