Recently, relaxor ferroelectric thin-film capacitors have attracted considerable attention for energy storage applications since their slim-type polarization-electric field hysteresis loops can yield large recoverable energy density (W-rec) and high efficiency (eta). In this work, we study the effects of buffer layers on energy storage properties of 0.93Pb(Mg1/3Nb2/3)O-3-0.07PbTiO(3) (PMN-PT) thin-film capacitors with a 5 nm-thick SrTiO3 (STO) and LaAlO3 (LAO) films. The energy storage properties of Pt/PMN-PT/SrRuO3 (SRO) capacitors are found to be significantly changed by incorporating the STO or LAO buffer layer at the top Pt/PMN-PT interface, while inserting the buffer layer at bottom PMN-PT/SRO interface shows negligible effects on the electrical properties. Specifically, with the STO buffering, the breakdown field is dramatically increased in the Pt/STO/PMN-PT/SRO capacitor due to the existence of an internal field in the STO, which prevents the growth of electrical trees from the bottom SRO to the top Pt electrode, and a large W-rec of ~48.91 J/cm(3), more than three times of that of the PMN-PT capacitor, is achieved. However, buffered by the LAO, the Pt/LAO/PMN-PT/SRO capacitor exhibits a reduced relaxor character, which may be ascribed to a pinning effect of nanodomains associated with the charged LAO/PMN-PT interface. As a result, both W-rec and eta are significantly lowered, compared to the non-buffered PMN-PT capacitor. These results provide physical insights into the modulation of relaxor and dielectric behaviors by designing the characteristics of buffer layers, demonstrating a way for enhancing energy storage properties in thin-film capacitors. Published under an exclusive license by AIP Publishing.
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