机译:Adaptive hybrid arbiter design for real-time traffic-aware scheduling
Natl Inst Technol, Dept Comp Sci & Engn, Srinagar, India;
Natl Inst Technol, Dept Elect & Commun Engn, Srinagar, India;
Circuit implementation; Circuit simulation; Circuit networks; Fair arbiter; Hybrid arbiter; Traffic aware; Adaptive matrix arbiter; Fault tolerance; NoC arbiters; Buffer aware;