机译:A VLSI Architecture with Multiple Fast Store-Based Block Parallel Processing for Output Probability and Likelihood Score Computations in HMM-Based Isolated Word Recognition
Graduate School of Information Science Nagoya University, Nagoya-shi, 464-8603 Japan;
Graduate School of Informatics, Kyoto University, Kyoto-shi, 606-8501 Japan;
speech recognition; hidden markov model (HMM); VLSI architecture; isolated word recognition;