The embodiments provided herein disclose a method to generate an inspection tool sampling plan, and more particularly, a method of improving die loss projection from an inspection result or optimizing a wafer region definition and sampling budget distribution for improved die loss projection. Some embodiments provide an apparatus for generating an inspection tool sampling plan comprising a memory storing a set of instructions and at least one processor configured to execute the set of instructions to cause the apparatus to perform a method for generating an inspection tool sampling plan. The method comprises providing input data for a wafer to a computational defect probability prediction model, dividing the wafer into a plurality of wafer regions having dies, determining defective die probabilities per wafer region from the computational defect probability prediction model, selecting at least one die from each wafer region of the plurality of wafer regions using the determined defective die probabilities, and generating a sampling plan for the wafer based on the selected dies. In some embodiments, an apparatus for optimizing an inspection tool sampling plan comprising a memory storing a set of instructions and at least one processor configured to execute the set of instructions to cause the apparatus to perform a method for optimizing an inspection tool sampling plan is disclosed. The method comprises providing input data for a wafer to a computational defect probability prediction model, and distributing a sampling budget for a region of a wafer based on an expected number of defective die count for the region compared to an expected number of defective die count for the wafer, wherein the expected number of defective die count for the region is a summation of predicted defective die probability for the region and the expected number of defective die count for the wafer is a summation of predicted defective die probability for the wafer, and wherein the predicted defective die probability for the region and the predicted defective die probability for the wafer are obtained from the computational defect probability prediction model. In some embodiments, an apparatus for optimizing an inspection tool sampling plan comprising a memory storing a set of instructions and at least one processor configured to execute the set of instructions to cause the apparatus to perform a method for optimizing an inspection tool sampling plan is disclosed. The method comprises providing input data for a wafer to a computational defect probability prediction model, determining a defective die probability for each die of the wafer from the computational defect probability prediction model, generating a sampling plan, evaluating a wafer region from the defective die probability for each die of the wafer, evaluating a sampling budget distribution for each evaluated wafer region, and using the sampling plan with the evaluated wafer region and sampling budget distribution to guide wafer inspection of the wafer. Other advantages of the present disclosure will become apparent from the following description taken in conjunction with the accompanying drawings wherein are set forth, by way of illustration and example, certain embodiments of the present disclosure.
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