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A High-Accuracy and Energy-Efficient CORDIC Based Izhikevich Neuron With Error Suppression and Compensation

机译:一种高精度、高能效的基于CORDIC的伊兹凯维奇神经元,具有误差抑制和补偿功能

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摘要

Bio-inspired neuron models are the key building blocks of brain-like neural networks for brain-science exploration and neuromorphic engineering applications. The efficient hardware design of bio-inspired neuron models is one of the challenges to implement brain-like neural networks, as the balancing of model accuracy, energy consumption and hardware cost is very challenging. This paper proposes a high-accuracy and energy-efficient Fast-Convergence COordinate Rotation DIgital Computer (FC-CORDIC) based Izhikevich neuron design. For ensuring the model accuracy, an error propagation model of the Izhikevich neuron is presented for systematic error analysis and effective error reduction. Parameter-Tuning Error Compensation (PTEC) method and Bitwidth-Extension Error Suppression (BEES) method are proposed to reduce the error of Izhikevich neuron design effectively. In addition, by utilizing the FC-CORDIC instead of conventional CORDIC for square calculation in the Izhikevich model, the redundant CORDIC iterations are removed and therefore, both the accumulated errors and required computation are effectively reduced, which significantly improve the accuracy and energy efficiency. An optimized fixed-point design of FC-CORDIC is also proposed to save hardware overhead while ensuring the accuracy. FPGA implementation results exhibit that the proposed Izhikevich neuron design can achieve high accuracy and energy efficiency with an acceptable hardware overhead, among the state-of-the-art designs.
机译:仿生神经元模型是类脑神经网络的关键构建块,用于脑科学探索和神经形态工程应用。仿生神经元模型的高效硬件设计是实现类脑神经网络的挑战之一,因为模型精度、能耗和硬件成本的平衡非常具有挑战性。该文提出了一种高精度、高能效的基于Izhikevich神经元的高精度、高能效的快速收敛坐标旋转数字计算机(FC-CORDIC)设计方法。为保证模型精度,提出了Izhikevich神经元的误差传播模型,用于系统误差分析和有效误差降低。为了有效降低伊兹凯维奇神经元设计的误差,提出了参数调谐误差补偿(PTEC)方法和比特扩展误差抑制(BEES)方法。此外,在伊兹凯维奇模型中,利用FC-CORDIC代替常规CORDIC进行平方计算,去除了多余的CORDIC迭代,从而有效减少了累积误差和所需计算量,从而显著提高了精度和能效。该文还提出了FC-CODIC的优化定点设计,在保证精度的同时节省硬件开销。FPGA实现结果表明,在最先进的设计中,所提出的Izhikevich神经元设计可以在可接受的硬件开销下实现高精度和高能效。

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