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首页> 外文期刊>IEICE Transactions on fundamentals of electronics, communications & computer sciences >Bit and Word-Level Common Subexpression Elimination for the Synthesis of Linear Computations
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Bit and Word-Level Common Subexpression Elimination for the Synthesis of Linear Computations

机译:Bit and Word-Level Common Subexpression Elimination for the Synthesis of Linear Computations

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In this paper, we propose a transformation tech- nique for themultiplications of one variable with multiple con- stants, which arefrequently seen in the various applications of signal processing,image processing, and so forth. The method is based on theexploration of common subexpressions among constants and reduces thenumber of shifts, additions, and sub- tractions to implement linearcomputations with hardware. Our method searches for regularity amongelements of a linear trans- form using matrix decomposition andgenerates a reduced data- flow graph which preserves the fullregularity.

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