A High-Speed Two-Parallel Radix-2~4 FFT/IFFT Processor for MB-OFDM UWB Systems

摘要

This paper presents a novel high-speed, low-complexity two-parallel 128-point radix-2~4 FFT/IFFT processor for MB-OFDM ultra-wideband (UWB) systems. The proposed high-speed, low-complexity FFT architecture can provide a higher throughput rate and low hardware complexity by using a two-parallel data-path scheme and a single-path delay-feedback (SDF) structure. The radix-2~4 FFT algorithm is also realized in our processor to reduce the number of complex multiplications. The proposed FFT/IFFT processor has been designed and implemented with 0.18-μm CMOS technology in a supply voltage of 1.8 V. The proposed two-parallel FFT/IFFT processor has a throughput rate of up to 900 Msample/s at 450 MHz while requiring much smaller hardware complexity and low power consumption.