机译:Chip Level Simulation of Substrate Noise Coupling and Interference in RF ICs with CMOS Digital Noise Emulator
Kobe Univ, Grad Sch Syst Informat, Kobe, Hyogo 6578501, Japan;
NEC Corp Ltd, Kawasaki, Kanagawa 2118666, Japan;
Renesas Mobile Corp, Tokyo 1000004, JapanRenesas Elect Corp, Kawasaki, Kanagawa 2118668, JapanTohoku Univ, Sendai, Miyagi 9808579, Japan;
substrate coupling; power delivery network; noise interference; wireless communication;