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Protocol wrappers for layered network packet processing in reconfigurable hardware

机译:Protocol wrappers for layered network packet processing in reconfigurable hardware

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A library of layered protocol wrappers processes Internet packets in reconfigurable hardware. Collectively, the wrappers simplify and streamline the implementation of high-level networking functions by abstracting the operation of lower-level packet processing functions. The library synthesizes into field-programmable gate array (FPGA) logic and is utilized in a network platform called the field-programmable port extender (FPX). The library processes asynchronous transfer mode (ATM) cells, ATM adaptation layer 5 (AAL5) frames, Internet protocol (IP) messages, and user datagram protocol (UDP) packets directly in hardware.' Applications can process data at several layers of the protocol stack using the library of wrappers discussed in this article. Layers are important for networks because they let applications abstract from above and below details of the network protocols. At the lowest layer, networks modify raw data passing between interfaces. At higher levels, the applications process variable length frames or IP packets. For example, an Internet router or firewall uses the IP, frame, and cell wrappers together with a circuit to perform routing lookups. At the user level, a network application may directly transmit or receive UDP messages by instantiating all wrappers, as shown in Figure 1.

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