A low-latency DMM-1 encoder for 3D-HEVC

摘要

Depth modeling mode 1 (DMM-1) is vital for 3D high-efficiency video coding, since it results in low distortion and is suitable for sharp boundaries. When designing DMM-1 encoders, traditional work used serial methods to calculate all the wedgelets, leading to large latency; they may meet the requirements of 30 fps 1080P 3D video at most, but may be powerless for higher frame rate or 3D video resolution. In this paper, we propose a flexible parallel architecture for DMM-1 encoder. It can simultaneously evaluate all the wedgelets, saving encoding time without increasing distortion; it can also be configured into a partial-parallel architecture to save area. Experiments show that our method can save 33.6-94.3% encoding time for different test schemes. Synthesis results in SMIC 55 nm show that the VLSI design for proposed parallel architecture can meet the requirements of 1080P and higher-resolution video processing in real time.