Fault section estimation for distribution substations using on-chip design

摘要

A new fault detection circuit for on-chip design is presented in this article. The circuit function to detect substation faults has been investigated and verified on an Altera DE1 platform with Cyclone II 2C20 fieldprogrammable gate array. The experimental results showed that the hardware prototyping is feasible for practical applications. Compared to existing fault diagnosis methods, the proposed hardware implementation is more suitable for real-time applications as it is able to achieve high-speed inference. Additionally, the computational burden on host computers in a supervisory control and data acquisition system can thus be reduced through the presented framework.