首页> 外文期刊>IEEE Journal of Solid-State Circuits >A 510-nW Wake-Up Keyword-Spotting Chip Using Serial-FFT-Based MFCC and Binarized Depthwise Separable CNN in 28-nm CMOS
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A 510-nW Wake-Up Keyword-Spotting Chip Using Serial-FFT-Based MFCC and Binarized Depthwise Separable CNN in 28-nm CMOS

机译:使用基于串行FFT的MFCC和28-NM CMOS中的二值化深度可分离CNN的510-NW唤醒关键字斑点芯片

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We propose a sub-mu W always- ON keyword spotting (mu KWS) chip for audio wake-up systems. It is mainly composed of a neural network (NN) and a feature extraction (FE) circuit. For significantly reducing the memory footprint and computational load, four techniques are used to achieve ultralow-power consumption: 1) a serial-FFT-based Mel-frequency cepstrum coefficient circuit is designed for FE, instead of the common parallel FFT. 2) A small-sized binarized depthwise separable convolutional NN (DSCNN) is designed as the classifier. 3) A framewise incremental computation technique is devised in contrast to the conventional whole-word processing. 4) Reduced computation allows a low system clock frequency, which enables near-threshold voltage operation, and low leakage memory blocks are designed to minimize the leakage power. Implemented in 28-nm CMOS technology, this mu KWS consumes 0.51 mu W at a 40-kHz frequency and a 0.41-V supply, with an area of 0.23 mm(2). Using the Google speech command data set, 97.3% accuracy is reached for a one-word KWS task and 94.6% for a two-word task.
机译:我们为音频唤醒系统提出了一个Sub-Mu永远的关键字拍摄(MU KWS)芯片。它主要由神经网络(NN)和特征提取(FE)电路组成。为了显着降低存储器足迹和计算负荷,使用四种技术来实现超级功耗:1)基于串行-FFT的熔融频率谱系码电路设计用于FE,而不是共同的并行FFT。 2)设计小型二金属化深度可分离卷积NN(DSCNN)作为分类器。 3)与传统的整理处理相比,帧向量增量计算技术。 4)降低的计算允许低系统时钟频率,这使得近阈值电压操作,并且设计低泄漏存储器块以最小化泄漏功率。在28-NM CMOS技术中实现,该MU KWS以40 kHz的频率和0.41V电源消耗0.51μW,面积为0.23mm(2)。使用Google语音命令数据集,为单词KWS任务达到97.3%的准确度,以及双字任务的94.6%。

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