A 273.5–312-GHz Signal Source With 2.3 dBm Peak Output Power in a 130-nm SiGe BiCMOS Process

摘要

This article presents a 300-GHz signal source that consists of a 75-GHz voltage controlled oscillator (VCO), a static frequency divider-by-two circuit, a 150-GHz doubler, a 150-GHz power amplifier, and a 300-GHz doubler in a commercial 130-nm SiGe BiCMOS process. To extend the frequency tuning range, a switched substrate shield variable base inductor is adopted in the 75-GHz VCO design. The output power of the 150-GHz power amplifier is enhanced by a proposed auxiliary inductor for adjusting the phase difference of the LC balun. Besides, through systematically analyzing the influences of the input power and the base bias voltage on the output power, the 300-GHz doubler has been carefully designed for maximizing the output power. The measured peak output power is 2.3 dBm at 286 GHz and the output power is higher than 0 dBm from 282 to 312 GHz. The output frequency can be tuned from 273.5 to 312 GHz. The phase noise is measured to be $-$88.5 dBc/Hz @ 1 MHz at 300 GHz and better than $-$85.5 dBc/Hz @ 1 MHz across the whole tuning range. The total chip area is 1.254 mm$<^>2$ and the whole dc power consumption is 435 mW, which results in 0.4% DC-to-RF efficiency. Compared with the state-of-the-art silicon-based signal source at around 300 GHz, this article achieves the highest output power, the best tuning range, and a comparable phase noise without on-chip or free-space power combining techniques.