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Experimental evaluation of various register-pressure-reduction heuristics

机译:各种套准减压试探法的实验评估

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Minimizing the amount of spill code is still an open problem in code generation and optimization. The amount of spill code depends on both the register allocation algorithm and the pre-allocation instruction scheduling algorithm that controls the register pressure. In this paper, we focus on the impact of pre-allocation instruction scheduling on the amount of spill code. Many heuristic techniques have been proposed to do instruction scheduling with the objective of minimizing register pressure and consequently the amount of spill code. However, the performance of these heuristic techniques has not been studied relative to optimality on real large-scale programs. In this paper, we present an experimental study that evaluates the performance of several pre-allocation scheduling heuristics. The evaluation involves computing an experimental lower bound on the size of gap between each heuristic's performance and optimal performance. We also propose a simple heuristic technique based on a specific permutation of two basic priority schemes and experimentally evaluate the performance of this technique compared with other heuristics, including the heuristics implemented in the LLVM open-source Compiler. The evaluation is carried out by running SPEC CPU2006 on real x86-64 hardware and measuring both the amount of spill code and the execution time. The results of our study show that the proposed heuristic technique gives better overall performance than LLVM's best heuristic on x86-64, although it produces slightly more spilling. The proposed heuristic has better overall performance, because it achieves a better balance between register pressure and instruction-level parallelism (ILP). This result shows the importance of ILP in pre-allocation scheduling even on out-of-order machines. Furthermore, the results of the study show that there is a large gap between the performance of any of the studied heuristics and optimal performance; even the best heuristic in the study produces significantly more spill code than the optimal amount. This experimental result quantifies the intuitive belief that it is unlikely to find a heuristic that works well in all cases, thus showing the need for more rigorous solutions using combinatorial approaches. The paper discusses the challenges and complexities that are involved in developing such rigorous solutions. Copyright (C) 2014 John Wiley & Sons, Ltd.
机译:最小化溢出代码的数量仍然是代码生成和优化中的未解决问题。溢出代码的数量取决于寄存器分配算法和控制寄存器压力的预分配指令调度算法。在本文中,我们集中于预分配指令调度对溢出代码量的影响。已经提出了许多启发式技术来进行指令调度,目的是最小化寄存器压力并因此最小化溢出代码的数量。但是,尚未针对相对于实际大型程序的最优性研究这些启发式技术的性能。在本文中,我们提出了一项实验研究,评估了几种预分配调度启发式方法的性能。评估涉及计算每个启发式算法的性能与最佳性能之间的差距大小的实验下限。我们还提出了一种基于两个基本优先级方案的特定排列的简单启发式技术,并与其他启发式方法(包括在LLVM开源编译器中实现的启发式方法)相比,通过实验评估了该技术的性能。通过在实际的x86-64硬件上运行SPEC CPU2006并测量溢出代码量和执行时间来进行评估。我们的研究结果表明,与LLVM在x86-64上的最佳启发式算法相比,所提出的启发式技术具有更好的总体性能,尽管它会产生更多的溢出。提议的启发式方法具有更好的整体性能,因为它在寄存器压力和指令级并行性(ILP)之间实现了更好的平衡。该结果表明,即使在乱序的机器上,ILP在预分配调度中的重要性。此外,研究结果表明,所研究的任何启发式算法的性能与最佳性能之间都存在较大的差距。即使是研究中最好的启发式方法,也会产生比最佳量大得多的溢出代码。该实验结果量化了直觉的信念,即不可能找到在所有情况下都能正常工作的启发式方法,从而表明需要使用组合方法提供更严格的解决方案。本文讨论了开发这样严格的解决方案所涉及的挑战和复杂性。版权所有(C)2014 John Wiley&Sons,Ltd.

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