Decoupling Strategies FOR PCBs

摘要

It's no secret that most digital devices demand a high peak current as circuits switch immediately following a clock edge (FIGURE 1). For example, a 100 MHz device with an average current draw of 4 A may actually require 20 A of current during the first few nanoseconds of the clock cycle. Obviously, including a 20 A power supply for this circuit will increase the size and cost of the final product. Less obviously, the series inductance of PCB traces and component pins may make it impossible for a monolithic power supply to respond quickly enough to satisfy instantaneous current demands. If insufficient current capacity is available to the device, it will experience some combination of voltage droop and ground bounce. These phenomena usually manifest as high-frequency noise. Decoupling capacitors address these problems by providing a distributed source of operating current accessible via a low-impedance (i.e., low-inductance) path. As a practical matter, the decoupling capacitors serve to directly power dig- ital devices, while the main power supply serves to recharge the capacitors. The key to the successful design of a capacitor decoupling network is choosing the right capacitors and using the right layout.