Pop Assembly Process Fundamentals

摘要

Solutions for packaging multiple die elements in a single package outline have evolved rapidly. Vertically stacking several semiconductor die on a single semiconductor package substrate proved efficient for a number of high-density memory applications. When mixing some newer multiple function processor and controller products with more mature, high yielding memory die elements, however, the overall package yield did not always meet expectations. A solution that has proved more efficient is a package-on-package (PoP) methodology designed to vertically combine fully packaged and pre-tested discrete logic and memory on separate array configured package substrate levels that are designed to align and mount on top of one another (see cover).