IMPROVING VIA DESIGN FOR HIGH DATA RATE APPLICATIONS

摘要

It was shown that all via holes can be classified as localizable and non-localizable. Only localizable via holes can be reliably simulated with a 3D full-wave solver in isolation from the rest of the board and safely used in multi-gigabit serial data channels. On the other hand, non-localizable via holes may require board-level analysis with all power distribution structures included. Reliable analysis of non-localizable vias at microwave rnfrequencies is practically an impossible task and such vias should be avoided by design. Single-ended via holes can be localized with electrically close stitching vias, connecting all reference planes of the connected transmission lines. Differential via holes are localizable for differential mode only if the barrels are electrically close. Common mode of differential via holes can be localized with the stitching vias, similar to the single-ended vias. In addition to the localization, the via-hole geometry has to be optimized to have minimal reflection loss over all frequency bands of interest to minimize the effect of resonances created by reflections between via holes. It was demonstrated that localizable minimal-reflection single-ended and differential via-holes can be successfully designed for 6 Gb/s to 10 Gb/s channels with good correspondence of simulations with measurements.