PASSING ELECTRICAL SIGNOFF

摘要

Most readers are familiar with the release of a PCB design to manufacturing, and the associated "signoff" that the design data must pass. This manufacturing signoff ensures that the production rules are abided by so that the board can be fabricated without error, at sufficient yield, and meets other manufacturing criteria. With the increasing complexity and speed of current designs, along with the availability of simulation and analysis tools, many companies are instituting procedures for electrical signoff, or ESO. This procedure subjects the design to rigorous rules to ensure that system timing, signal integrity, power integrity and EMI/EMC are all within established limits. What constitutes the parameters of ESO, and how to most efficiently ensure a design will pass? And what steps must be taken for a design pass the first time, without the expense of reworking the design?