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Managing Time Delays

机译:管理时间延迟

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摘要

TO KEEP A good high-speed signal quality from driver to receiver on a PCB is not an easy task for designers. One of the most challenging issues is managing the propagation delay and relative time delay mismatches. To manage the time delays, we need to know how to calculate trace length from time delay value in order to implement the PCB trace routing accordingly. Let me take you through the process. Calculating signal speed. According to physics, electromagnetic signals travel in a vacuum or through the air at the same speed as light, which is: Vc = 3 × 10~8M/sec = 186,000 miles/sec = 11.8 ins A signal travels on a PCB transmission line at a slower speed, affected by the dielectric constant (Er) of the PCB material. The transmission line structure also affects the signal speed.
机译:保持PCB上从驱动器到接收器的良好高速信号质量对设计人员而言并非易事。最具挑战性的问题之一是管理传播延迟和相对时间延迟不匹配。为了管理时间延迟,我们需要知道如何根据时间延迟值计算走线长度,以便相应地实现PCB走线路由。让我引导您完成整个过程。计算信号速度。根据物理学,电磁信号在真空或空气中以与光相同的速度传播,即:Vc = 3×10〜8M / sec = 186,000英里/秒= 11.8 in / ns在PCB传输中传播信号线速度较慢,受PCB材料的介电常数(Er)的影响。传输线结构也会影响信号速度。

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