Analytical compensation of harmonics caused by 60° flat-top modulation

摘要

The 60 degrees Flat-Top PWM modulation method (also called DPWM1, two-phase, or 60 degrees bus-clamp) is widely used by the industry to reduce switching losses in three-phase inverters by connecting one of the three-phase legs to the positive or the negative DC rail continuously for 60 degrees of the fundamental period. It is widely known that - compared to the most used SVM modulation - the Flat-Top modulation increases switching frequency current components. The actual amount is highly dependent on the modulation index. It is a lesser known fact that - at each switch-over happening at every 60 degrees, because of the change of the phase in the switching frequency current component - low-order harmonics are produced as well. The effect of these can become especially significant, if one of the produced frequencies falls near to the resonant frequency of the LC or LCL filter. A modification of the original Flat-Top method has been developed, that corrects the duty ratios around the edges of the zero-sequence voltage signal. This way the filtered output voltage remains sinusoidal, while keeping the efficiency advantage of the Flat-Top. Experimental results on two different inverters show that the novel method significantly decreases the current THD.