首页> 外文期刊>IEEE Transactions on Parallel and Distributed Systems >Optimizing array-intensive applications for on-chip multiprocessors
【24h】

Optimizing array-intensive applications for on-chip multiprocessors

机译:优化片上多处理器的阵列密集型应用

获取原文
获取原文并翻译 | 示例
           

摘要

With energy consumption becoming one of the first-class optimization parameters in computer system design, compilation techniques that consider performance and energy simultaneously are expected to play a central role. In particular, compiling a given application code under performance and energy constraints is becoming an important problem. In this paper, we focus on an on-chip multiprocessor architecture and present a set of code optimization strategies. We first evaluate an adaptive loop parallelization strategy (i.e., a strategy that allows each loop nest to execute using a different number of processors if doing so is beneficial) and measure the potential energy savings when unused processors during execution of a nested loop are shut down (i.e., placed into a power-down or sleep state). Our results show that shutting down unused processors can lead to as much as 67 percent energy savings at the expense of up to 17 percent performance loss in a set of array-intensive applications. To eliminate this performance penalty, we also discuss and evaluate a processor preactivation strategy based on compile-time analysis of nested loops. Based on our experiments, we conclude that an adaptive loop parallelization strategy combined with idle processor shut down and preactivation can be very effective in reducing energy consumption without increasing execution time. We then generalize our strategy and present an application parallelization strategy based on integer linear programming (ILP). Given an array-intensive application, our optimization strategy determines the number of processors to be used in executing each loop nest based on the objective function and additional compilation constraints provided by the user/programmer. Our initial experience with this constraint-based optimization strategy shows that it is very successful in optimizing array-intensive applications on on-chip multiprocessors under multiple energy and performance constraints.
机译:随着能耗成为计算机系统设计中一流的优化参数之一,预计同时考虑性能和能耗的编译技术将发挥核心作用。特别地,在性能和能量约束下编译给定的应用程序代码已成为一个重要问题。在本文中,我们专注于片上多处理器体系结构,并提出了一组代码优化策略。我们首先评估一种自适应循环并行化策略(即,如果这样做有利于允许每个循环嵌套使用不同数量的处理器执行的策略),并测量在执行嵌套循环期间关闭未使用的处理器时可能节省的能量(即处于掉电或睡眠状态)。我们的结果表明,在一组阵列密集型应用程序中,关闭未使用的处理器可以节省多达67%的能源,但会损失高达17%的性能。为了消除这种性能损失,我们还讨论和评估了基于嵌套循环的编译时分析的处理器预激活策略。根据我们的实验,我们得出结论,自适应循环并行化策略与空闲处理器关闭和预激活相结合,可以在不增加执行时间的情况下非常有效地减少能耗。然后,我们概括我们的策略,并提出基于整数线性规划(ILP)的应用程序并行化策略。给定一个数组密集型应用程序,我们的优化策略将根据目标函数和用户/程序员提供的其他编译约束来确定执行每个循环嵌套所使用的处理器数量。我们基于这种基于约束的优化策略的初步经验表明,它在多种能量和性能约束下,在片上多处理器上优化阵列密集型应用方面非常成功。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号