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Affordable Analysis for Next-Generation High Performance Designs

机译:下一代高性能设计的经济实惠的分析

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摘要

Growing demand for high performance RF, microwave and serial communication devices (SERDES) has highlighted the need for good signal integrity (SI) in modern designs. Engineers need to accurately characterize timing, jitter and noise performance to determine the operating envelope of their designs and guarantee reliable operation once deployed. Validating SI has traditionally been a specialist task requiring high-end oscilloscopes that can be both expensive and bulky. Realtime digital oscilloscopes, above 10 GHz, are suited to debug and troubleshoot tasks, and can be used to check signal integrity. However, they tend to be expensive and suffer from drawbacks - including limited 8-bit ADC resolution, reduced to 6 bits or less at high frequencies - and relatively high intrinsic jitter floor.
机译:对高性能射频,微波和串行通信设备(SERDES)的需求不断增长,突显了现代设计中对良好信号完整性(SI)的需求。工程师需要准确地描述时序,抖动和噪声性能,以确定其设计的工作范围,并确保一旦部署便能可靠运行。传统上,验证SI是一项专业任务,需要昂贵且笨重的高端示波器。 10 GHz以上的实时数字示波器适合调试和故障排除任务,可用于检查信号完整性。但是,它们往往很昂贵,并且存在缺陷-包括有限的8位ADC分辨率,在高频下降低到6位或更少-以及相对较高的固有抖动本底。

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  • 来源
    《Microwave Journal》 |2013年第9期|156158|共2页
  • 作者

    Pico Technology;

  • 作者单位

    St Neots, UK;

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  • 原文格式 PDF
  • 正文语种 eng
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