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A 2.4-GHz sub-mW CMOS receiver front-end for wireless sensors network

机译:用于无线传感器网络的2.4 GHz Sub-mW CMOS接收器前端

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摘要

A 2.4-GHz fully integrated CMOS receiver front-end using current-reused folded-cascode circuit scheme is presented. A configuration utilizing vertically stacked low-noise amplifier (LNA) and a folded-cascode mixer is proposed to improve both conversion gain and noise figure suitable for sub-mW receiver circuits. The proposed front-end achieves a conversion gain of 31.5dB and a noise figure of 11.8dB at 10MHz with 500-/spl mu/A bias current from a 1.0-V power supply. The conversion gain and noise figure improvements of the proposed front-end over a conventional merged LNA and single-balanced mixer are 11dB and 7.2dB at 10MHz, respectively, with the same power consumption of 500/spl mu/W.
机译:提出了一种使用电流重用折叠共源共栅电路方案的2.4 GHz完全集成CMOS接收器前端。提出了一种利用垂直堆叠的低噪声放大器(LNA)和折叠共源共栅混频器的配置,以提高转换增益和噪声系数,适用于低于mW的接收器电路。所提出的前端在1.0MHz电源下具有500- / spl mu / A偏置电流的情况下,在10MHz时可获得31.5dB的转换增益和11.8dB的噪声系数。与常规的合并LNA和单平衡混频器相比,拟议前端的转换增益和噪声系数改进在10MHz时分别为11dB和7.2dB,而相同的功耗为500 / spl mu / W。

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