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A 10-GHz Bandwidth Transimpedance Amplifier With Input DC Photocurrent Compensation Loop

机译:具有输入直流光电流补偿环路的10-GHz带宽减阻放大器

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A transimpedance amplifier (TIA) fabricated in a 55-nm low-power CMOS process is presented. The TIA, a current-reuse regulated cascode (CRRCC) topology, includes an active balun and differential output drivers. To maximize integration in high-speed photoreceivers, the TIA also includes dc current compensation, removing the requirement for bias-tees between the TIA and the photodiode (PD). The TIA achieves a transimpedance gain of 69 dB Omega across a 3-dB bandwidth of 10.7 GHz. Additionally, the TIA demonstrates low-noise performance with an equivalent input noise density of 15 pA/root Hz in the passband. The dc compensation is capable of providing a fixed bias voltage for a PD while sourcing up to 2.4 mA or sinking up to 1 mA of photocurrent. The TIA, including active balun and dc current compensation, consumes 15.7 mW, while the output buffer consumes 90.7 mW. The total active area of the circuit is 0.07 mm(2), and 0.21 mm(2) with pads.
机译:提出了一种在55nm低功耗CMOS工艺中制造的缩减放大器(TIA)。 TIA,电流重用调节的CASCODE(CRRCC)拓扑,包括有源平衡的Balan和差分输出驱动器。为了最大限度地在高速光接收器中集成,TIA还包括直流电流补偿,从而消除了TIA和光电二极管(PD)之间的偏置T恤的要求。 TIA在10.7 GHz的3 dB带宽上实现了69 dB Omega的跨阻抗增益。另外,TIA在通带中展示了具有15Pa / Root Hz的等效输入噪声密度的低噪声性能。 DC补偿能够为PD提供固定偏置电压,同时排出高达2.4 mA或沉入最多1 mA的光电流。 TIA,包括活跃的BalUn和DC电流补偿,消耗15.7 MW,而输出缓冲器消耗90.7 MW。电路的总有效面积为0.07 mm(2),和0.21mm(2)垫。

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