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A 1.8–3.2-GHz Doherty Power Amplifier in Quasi-MMIC Technology

机译:准MMIC技术的1.8–3.2 GHz Doherty功率放大器

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This letter presents the design and characterization of a quasi-integrated Doherty power amplifier for base-station applications. The prototype is based on GaN on SiC 0.25-mu m 50-V transistors, whereas the passive matching networks are realized on a GaAs substrate. The design, based on a dual-input Doherty architecture, achieves a continuous-wave (CW) output power higher than 42 dBm and a backoff efficiency higher than 38% over the 1.8-3.2-GHz frequency band. By using an off-chip coupler, a single-input operation is also possible with a slight reduction in performance, i. e., CW output power and backoff efficiency higher than 41.4 dBm and 36%, respectively, on the 1.8-3.2-GHz band. System-level characterization shows higher peak power achievable than in CW condition as well as the linearizability of the amplifier under modulated signal conditions.
机译:这封信介绍了用于基站应用的准集成Doherty功率放大器的设计和特性。该原型基于0.25μmSiC 50-V晶体管上的GaN,而无源匹配网络则在GaAs衬底上实现。该设计基于双输入Doherty架构,在1.8-3.2 GHz频段上实现了高于42 dBm的连续波(CW)输出功率和高于38%的退避效率。通过使用片外耦合器,也可以进行单输入操作,但性能会稍有下降。例如,在1.8-3.2 GHz频段上,CW输出功率和退避效率分别高于41.4 dBm和36%。系统级特性显示出比CW条件下可实现的峰值功率更高,以及调制信号条件下放大器的线性化能力。

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