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Design and Implementation of MIMO-OFDM Baseband Processor for High-Speed Wireless LANs

机译:高速无线局域网中MIMO-OFDM基带处理器的设计与实现

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摘要

In this brief, we present the design and implementation results of a digital 120 Mb/s multiple-input multiple-output (MIMO) orthogonal frequency-division multiplexing (OFDM) wireless LAN (WLAN) baseband processor based on the proposed decoding algorithms. The processor has two MIMO-OFDM modes, space-frequency block coded OFDM and space division multiplexed OFDM. From those, it achieves a considerable performance gain as well as supports double data rates compared to the conventional IEEE 802.11a WLANs. In the results of performance evaluation, the processor requires a signal-to-noise ratio of 1.8–27 dB for transmission modes at 10% packet error rate, and the chip is implemented with 4.8 M transistors in 3.9 $,times,$3.9 ${hbox {mm}}^{2}$ using 0.18-$mu{hbox {m}}$ CMOS process.
机译:在本文中,我们基于所提出的解码算法,介绍了数字120 Mb / s多输入多输出(MIMO)正交频分复用(OFDM)无线局域网(WLAN)基带处理器的设计和实现结果。该处理器具有两种MIMO-OFDM模式,即空频块编码OFDM和空分复用OFDM。通过这些,与传统的IEEE 802.11a WLAN相比,它可以实现可观的性能提升并支持双倍数据速率。在性能评估结果中,处理器要求传输模式下的信噪比为1.8–27 dB,且包错误率为10%,并且该芯片采用4.8 M晶体管实现,成本为3.9 $,3.9 $ { hbox {mm}} ^ {2} $使用0.18- $ mu {hbox {m}} $ CMOS工艺。

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