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首页> 外文期刊>Journal of Spacecraft and Rockets >Multilevel Radiation Protection of Partially Reconfigurable Field Programmable Gate Array Devices
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Multilevel Radiation Protection of Partially Reconfigurable Field Programmable Gate Array Devices

机译:部分可重新配置的现场可编程门阵列设备的多级辐射防护

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Protection of on-board computing platforms from radiation effects is a complex problem. However, the cost of hardware failure in high-performance computers usually is very high, because it can result in billons of operations being lost within one second of system stall or even in mission failure. Traditional approaches based on redundant hardware and mechanical shielding can be very costly and still cannot guarantee full protection of high-performance computing platforms from radiation. Instead, we propose an approach based on run-time self-restoration of digital computing circuits allocated in partially reconfigurable field programmable gate array devices (FPGA). A novel approach is presented that allows sustaining the performance of the run-time reconfigurable stream processing system at its maximum level. This becomes possible by development of a multilevel self-restoration mechanism based on self-assembling/reassembling the virtual hardware components inside the FPGA in run time. This approach allows restoration from transient and permanent hardware faults without or with optimum performance degradation. However, at this stage of the project the fault detection aspect was not considered. All levels of the proposed mechanism were investigated and tested on the prototype reconfigurable computing platform. This platform was developed on a base of XILINX Virtex FPGA devices. Analysis of results shows that the developed mechanism of self-restoration allows very fast (run-time) restoration of functionality. On the other hand, it dramatically increases the lifetime of FPGA based space-borne computing platforms.
机译:保护机载计算平台免受辐射影响是一个复杂的问题。但是,高性能计算机中的硬件故障成本通常很高,因为它可能导致在系统停止运行的一秒钟内丢失操作指令,甚至导致任务故障。基于冗余硬件和机械屏蔽的传统方法可能非常昂贵,并且仍不能保证高性能计算平台不受辐射的全面保护。相反,我们提出了一种基于在部分可重新配置的现场可编程门阵列设备(FPGA)中分配的数字计算电路的运行时自我恢复的方法。提出了一种新颖的方法,该方法允许将运行时可重配置流处理系统的性能维持在最大水平。通过基于运行时在FPGA内部自组装/重新组装虚拟硬件组件的多级自恢复机制的开发,这成为可能。这种方法可以从瞬态和永久性硬件故障中恢复,而不会或不会降低性能。但是,在项目的此阶段,未考虑故障检测方面。在原型可重构计算平台上对提出的机制的所有级别进行了研究和测试。该平台是基于XILINX Virtex FPGA器件开发的。结果分析表明,已开发的自我恢复机制可以非常快速(运行时)恢复功能。另一方面,它极大地延长了基于FPGA的星载计算平台的使用寿命。

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