机译:神经形态视觉算法的硬件加速
Microsystems Design Laboratory The Pennsylvania State University">(1);
Microsystems Design Laboratory The Pennsylvania State University">(1);
Microsystems Design Laboratory The Pennsylvania State University">(1);
IBM Systems and Technology Group">(2);
School of Electrical Computer and Energy Engineering Arizona State University">(3);
Microsystems Design Laboratory The Pennsylvania State University">(1);
School of Electrical Computer and Energy Engineering Arizona State University">(3);
Domain-specific acceleration; Power efficiency; Neuromorphic systems;
机译:神经形态视觉算法的硬件加速
机译:模拟高阻双层RRAM器件,用于神经形态计算的硬件加速
机译:神经形态硬件实现的学习算法的一般形式
机译:加速神经形态视觉算法的硬件架构
机译:使用具有自定义硬件的软核心CPU加速计算机视觉算法
机译:神经形态硬件实现的学习算法的一般形式
机译:神经形态硬件实现的学习算法的一般形式