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机译:基于游程长度代码的硬件高效并行架构,用于实时斑点分析
Beijing Key Laboratory of Digital Media, School of Computer Science and Engineering, Beihang University;
Beijing Key Laboratory of Digital Media, School of Computer Science and Engineering, Beihang University;
Beijing Key Laboratory of Digital Media, School of Computer Science and Engineering, Beihang University,State Key Laboratory of Virtual Reality Technology and Systems, Beihang University;
Beijing Key Laboratory of Digital Media, School of Computer Science and Engineering, Beihang University,State Key Laboratory of Virtual Reality Technology and Systems, Beihang University;
Beijing Key Laboratory of Digital Media, School of Computer Science and Engineering, Beihang University,State Key Laboratory of Virtual Reality Technology and Systems, Beihang University;
Blob analysis; Parallelization; Convex hull calculation; FPGA;
机译:注册基于部分并行编码器和解码器体系结构的免费极化码
机译:大规模并行架构上的基于数据并行帧内解码,用于基于块的图像和视频编码
机译:基于吠陀算法的基于纠错码的容错并行FFT新架构
机译:基于轮廓轮廓和色斑分析的实时人体运动分析
机译:实时LDPC编码的半并行架构。
机译:行程编码图形规则可生物化学编辑的设计以及基于DNA的密码编码系统的隐写数字数据嵌入
机译:基于矩阵运算的多核架构网络编码并行化
机译:基于算法的低功耗变换编码体系结构。第2部分。对数复杂性,统一架构和有限精度分析。