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首页> 外文期刊>Journal of circuits, systems and computers >LOGARITHMICAL CURVATURE-CORRECTED VOLTAGE REFERENCES WITH IMPROVED TEMPERATURE BEHAVIOR
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LOGARITHMICAL CURVATURE-CORRECTED VOLTAGE REFERENCES WITH IMPROVED TEMPERATURE BEHAVIOR

机译:具有改进的温度特性的对数曲线校正电压参考

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Two voltage reference circuits will be presented. For the first circuit, the linear compensation of V_(GS)(T) for an MOS transistor in subthreshold region will be realized using an original offset voltage follower block as PTAT voltage generator, with the advantages of reducing the silicon area and of increasing accuracy by replacing matched resistors with matched transistors. A new logarithmic curvature-correction technique will be implemented using an asymmetric differential amplifier for compensating the logarithmic temperature dependent term from V_(GS)(T). Because of the operation in weak inversion of all MOS transistors, the circuit will have a very small current consumption, making it compatible with low-power low-voltage designs. The simulated temperature coefficient of the reference voltage for V_(DD) = 2.5 V and a temperature range 0 < t < 30℃ is 36.5ppm/K, confirming the theoretical estimations. The variation of the reference voltage with respect to the supply voltage is 1.5mV/V for 2-4 V. The circuit current consumption is about 1 μA and the minimal supply voltage is 2 V. The main goal of the second proposed voltage reference is to improve the temperature behavior of a previous reported bipolar voltage reference, by replacing the bipolar transistors with MOS transistors working in weak inversion, with the advantage of obtaining the compatibility with CMOS technology. The new proposed curvature-correction technique will be based on the compensation of the nonlinear temperature dependence of the gate-source voltage for a subthreshold operated MOS transistor by a correction current obtained by taking the difference between two gate-source voltages for MOS transistors biased at drain currents with different temperature dependencies. The circuit is implemented in 0.35μm CMOS technology. The SPICE simulation confirms the theoretical estimated results, reporting a temperature coefficient of 4.23 ppm/K for the commercial temperature range, 0 < t < 70℃ and a small supply voltage, V_(DD) = 2.5 V. The variation of the reference voltage with respect to the supply voltage is 0.9 mV/V for 2-4 V.
机译:将介绍两个参考电压电路。对于第一个电路,将使用原始偏移电压跟随器块作为PTAT电压发生器,实现亚阈值区域内MOS晶体管V_(GS)(T)的线性补偿,其优点是减少了硅片面积并提高了精度用匹配的晶体管代替匹配的电阻。将使用不对称差分放大器实现一种新的对数曲率校正技术,以补偿V_(GS)(T)的对数温度相关项。由于所有MOS晶体管的弱反相操作,该电路将具有非常小的电流消耗,从而使其与低功率低压设计兼容。在V_(DD)= 2.5 V和0

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