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Constraint LTL satisfiability checking without automata

机译:没有自动机的约束LTL可满足性检查

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摘要

This paper introduces a novel technique to decide the satisfiability of formulae written in the language of Linear Temporal Logic with both future and past operators and atomic formulae belonging to constraint system D (CLTLB(D) for short). The technique is based on the concept of bounded satisfiability, and hinges on an encoding of CLTLB(D) formulae into QF-EUD, the theory of quantifier-free equality and uninterpreted functions combined with D. Similarly to standard LTL, where bounded model-checking and SAT-solvers can be used as an alternative to automata-theoretic approaches to model-checking, our approach allows users to solve the satisfiability problem for CLTLB(D) formulae through SMT-solving techniques, rather than by checking the emptiness of the language of a suitable automaton. The technique is effective, and it has been implemented in our Zot formal verification tool.
机译:本文介绍了一种新技术,该技术可确定使用线性时态逻辑语言编写的公式的可满足性,该公式具有未来和过去的运算符以及属于约束系统D的原子公式(简称CLTLB(D))。该技术基于有界可满足性的概念,并且取决于将CLTLB(D)公式编码为QF-EUD,无量词相等性理论以及与D结合的未解释函数。类似于标准LTL,其中有界模型-检查和SAT求解器可以代替自动机理论方法进行模型检查,我们的方法允许用户通过SMT解决技术来解决CLTLB(D)公式的可满足性问题,而不是通过检查是否为空来解决合适的自动机的语言。该技术是有效的,并且已在我们的Zot正式验证工具中实现。

著录项

  • 来源
    《Journal of Applied Logic》 |2014年第4期|522-557|共36页
  • 作者单位

    Dipartimento di Elettronica, Informazione e Bioingegneria, Politecnico di Milano, Milano, Italy;

    Dipartimento di Elettronica, Informazione e Bioingegneria, Politecnico di Milano, Milano, Italy;

    Dipartimento di Elettronica, Informazione e Bioingegneria, Politecnico di Milano, Milano, Italy;

    Dipartimento di Elettronica, Informazione e Bioingegneria, Politecnico di Milano, Milano, Italy;

    Dipartimento di Elettronica, Informazione e Bioingegneria, Politecnico di Milano, Milano, Italy;

    Dipartimento di Elettronica, Informazione e Bioingegneria, Politecnico di Milano, Milano, Italy;

  • 收录信息
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类
  • 关键词

    Satisfiability; Constraint LTL; Bounded satisfiability checking;

    机译:可满足性;约束LTL;有界可满足性检查;

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