High-Speed and Low-Power Non-Return-to-Zero Delayed Flip-Flop Circuit Using Resonant Tunneling Diode/High Electron Mobility Transistor Integration Technology

摘要

A high-speed and low-power delayed flip-flop circuit with non-return-to-zero mode output using a new negative differential resistance logic element is proposed and fabricated using resonant tunneling diode (RTD)/high electron mobility transistor (HEMT) integration technology on an InP substrate. The number of devices used in the delayed flip-flop and the power dissipation has been significantly reduced by using the proposed scheme. The operation of the fabricated delayed flip-flop is demonstrated up to 26 Gb/s with a very low power dissipation of about 2.8 mW at a power supply voltage of 0.9 V.