机译:基于磁隧道结元件的非易失性现场可编程门阵列逻辑模块设计
Department of Electronics Engineering, Ewha Womans University, 11-1 Daehyun-dong, Seodaemun-gu, Seoul 120-750, Korea;
Department of Electronics Engineering, Ewha Womans University, 11-1 Daehyun-dong, Seodaemun-gu, Seoul 120-750, Korea;
Department of Electronics Engineering, Ewha Womans University, 11-1 Daehyun-dong, Seodaemun-gu, Seoul 120-750, Korea;
Department of Electronics Engineering, Ewha Womans University, 11-1 Daehyun-dong, Seodaemun-gu, Seoul 120-750, Korea;
Department of Electronics Engineering, Ewha Womans University, 11-1 Daehyun-dong, Seodaemun-gu, Seoul 120-750, Korea;
机译:非易失性现场可编程门阵列,使用基于2晶体管-1-MTJ单元的多上下文阵列实现功率和面积高效的动态可重构逻辑
机译:基于自旋转矩磁隧道结的伪自旋晶体管架构的非易失性静态随机存取存储器和非易失性触发器的非易失性门控现场可编程门阵列
机译:基于磁隧道结的240块非易失性现场可编程门阵列芯片的制造,这些芯片都为浪费功率的逻辑应用而跳过了浪费的写操作
机译:具有用于现场可编程门阵列的共享SRAM表的逻辑模块
机译:使用逻辑综合提高了现场可编程门阵列设计效率。
机译:滚动循环放大平台组装的阻遏器逻辑模块以构建一组逻辑门
机译:基于新型可逆逻辑模块的可逆可编程门阵列设计