Optimization of calendering process using Taguchi method to improve the performance of printed capacitor

摘要

One of the major factors that determine the performance of printed parallel-plate capacitors is the thickness of the dielectric layer; the thickness is affected significantly by the surface roughness of the conductive layer underneath the dielectric layer. In this study, we employed a calendering process to reduce the surface roughness of the first conductive layer. After a set of experiments involving a calendering process, the Taguchi method was applied to determine the optimal setting of the process parameters in terms of speed, nip pressure, and temperature. In the Taguchi method, a three-level orthogonal array was used to decide the signal-to-noise ratio. In addition, analysis of variance and F-test values were used to determine the most significant process parameters that affect the output, i.e., capacitance. Validation tests were carried out using the optimal levels of the process parameters and the results were presented. These results can be used as a practical guideline for determining optimal parameters in a calendering process for printed electronics applications.