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首页> 外文期刊>International journal of numerical modelling >A 10‐mW 3.9‐dB NF transformer‐based V‐band low‐noise amplifier in 65‐nm CMOS
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A 10‐mW 3.9‐dB NF transformer‐based V‐band low‐noise amplifier in 65‐nm CMOS

机译:基于65nm CMOS的10mW 3.9dB NF变压器V波段低噪声放大器

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A V-band low-noise amplifier (LNA) employing a Gm-boosting technique is presented in this paper. With the transformers, which are applied between the adjacent stages, the transconductances of the following transistors are boosted. Thus, the gain of the circuit is effectively enhanced. The noise figure (NF) is also decreased with the technique. Utilizing a commercial 65-nm CMOS technology, the LNA is demonstrated. The measurement results show that the LNA achieves a maximum gain of 17.4 dB at 57.1 GHz with 10.9-GHz 3-dB gain bandwidth. The measured NF of the LNA is from 3.95 dB to 4.6 dB at 53 to 64 GHz. The tested input 1-dB gain compression point (IP1dB) is -14.2 dBm at 57 GHz. The DC power consumption is only 10 mW with 1-V power supply. The chip area is only 0.255 mm(2) with all testing pads.
机译:本文提出了一种采用Gm增强技术的V波段低噪声放大器(LNA)。通过在相邻级之间施加变压器,可以提高后续晶体管的跨导。因此,有效地提高了电路的增益。该技术也降低了噪声系数(NF)。演示了利用商用65纳米CMOS技术的LNA。测量结果表明,LNA在57.1 GHz处具有10.9 GHz 3-dB的增益带宽,可实现17.4 dB的最大增益。 LNA的测得NF在53至64 GHz时为3.95 dB至4.6 dB。在57 GHz下,经过测试的输入1 dB增益压缩点(IP1dB)为-14.2 dBm。使用1V电源时,DC功耗仅为10 mW。所有测试焊盘的芯片面积仅为0.255 mm(2)。

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