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机译:使用高效的3-D DCT算法的视频编码器的VLSI实现
Department of ECE, Amrita Vishwa Vidyapeetham, Amrita School of Engineering, No 26 and 27 Kasavanahalli, Carmelram PO, Off Sarjapur Road, Bangalore 560 035, India;
Department of ECE, Amrita Vishwa Vidyapeetham, Amrita School of Engineering, No 26 and 27 Kasavanahalli, Carmelram PO, Off Sarjapur Road, Bangalore 560 035, India;
Department of ECE, Amrita Vishwa Vidyapeetham, Amrita School of Engineering, No 26 and 27 Kasavanahalli, Carmelram PO, Off Sarjapur Road, Bangalore 560 035, India;
Department of ECE, Amrita Vishwa Vidyapeetham, Amrita School of Engineering, No 26 and 27 Kasavanahalli, Carmelram PO, Off Sarjapur Road, Bangalore 560 035, India;
3-D DCT; video encoder; low power; VLSI architecture; video compression;
机译:可扩展逆DCT的数字电视视频格式转换及其用于VLSI的递归算法
机译:基于CORDIC的两点幂DCT快速算法及其高效的VLSI实现
机译:具有良好量化特性的新颖VLSI算法和架构,可用于DCT的高通量面积高效脉动阵列实现
机译:HEVC硬编码帧内编码器中基于功率敏感型VBS-DCT VLSI设计的基于编码敏感的近似算法
机译:用于图像和视频信号处理算法的高效VLSI架构。
机译:使用通用Hebbian算法的高效多通道Spike排序VLSI架构
机译:DCT高通量面积高效脉动阵列实现的新型具有良好量化性能的VLSI算法和架构