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首页> 外文期刊>International Journal of Computers & Applications >POWER ANALYSIS OF MULTIPLE HASHING BLOOM FILTER ARCHITECTURE FOR NETWORK APPLICATIONS
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POWER ANALYSIS OF MULTIPLE HASHING BLOOM FILTER ARCHITECTURE FOR NETWORK APPLICATIONS

机译:网络应用中多个散列bloom过滤器体系结构的功耗分析

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摘要

A bloom filter is a simple space-efficient randomized data structure for representing a set in order to support network and database query systems. Although bloom filters were invented in the 1970s and have been heavily used in database applications, they have only recently received widespread attention in the networking literature. Software applications frequently fail to identify so many signatures through comparisons at very high speeds. We introduce a low-power bloom filter architectures which is space-and power effective in hardware platforms. Instead of working on programming phase or technology, our work concentrated on lookup techniques of bloom filters. We have chosen H3 Universal hash function to be utilized in hardware applications of bloom filter, and power consumption is measured using third party physical layout tool in complementary metal-oxide-semiconductor 60-nm technology. Power consumption of power analysis shows that decrement in number of hash functions per stage results in power gain. Proposed ripple through architecture is implemented in third party field programmable gate array and compared with previous works.
机译:Bloom过滤器是一种简单的节省空间的随机数据结构,用于表示一个集合,以支持网络和数据库查询系统。尽管Bloom过滤器是在1970年代发明的,并已在数据库应用程序中大量使用,但它们直到最近才在网络文献中受到广泛关注。软件应用程序经常无法通过非常高的比较来识别出这么多签名。我们介绍了一种低功耗布隆滤波器架构,该架构在硬件平台上具有空间和功率效率。而不是在编程阶段或技术上工作,我们的工作集中在Bloom过滤器的查找技术上。我们选择了H3通用哈希函数以用于布隆过滤器的硬件应用中,并使用互补金属氧化物半导体60 nm技术中的第三方物理布局工具来测量功耗。功耗分析的功耗表明,每级哈希函数数量的减少会导致功率增益。拟议的通过体系结构的纹波在第三方现场可编程门阵列中实现,并与以前的工作进行了比较。

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