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Low-noise low-power front-end logarithmic amplifier for neural recording system

机译:用于神经记录系统的低噪声低功率前端对数放大器

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摘要

In this work, a low-power, low-noise logarithmic preamplifier for biopotential and neural recording application is presented. The amplifier is based on a linear limit logarithmic amplifier technique, and an active filter as a DC cancellation filter has been included to its input in order to eliminate DC offsets, which are produced at the electrode-tissue interface. This system has been simulated in a UMC standard 90-nm 1P9M CMOS process. Five dual gain stages are used to produce the required linear limit logarithmic amplifier. The dynamic range of the amplifier is measured to be 48 dB which covers the signals with amplitude from 20 μV to 5 mV. The amplifier consumes 23.5 μW from a 1.2-V power supply and has a maximum gain of 69.8 dB. The simulated input referred noise is 5.3 μV over 0.1 Hz to 20 kHz.
机译:在这项工作中,提出了一种用于生物电势和神经记录应用的低功耗,低噪声对数前置放大器。该放大器基于线性极限对数放大器技术,并且有源滤波器作为直流消除滤波器已包含在其输入中,以消除在电极组织界面处产生的直流偏移。该系统已经在UMC标准90纳米1P9M CMOS工艺中进行了仿真。五个双增益级用于产生所需的线性极限对数放大器。放大器的动态范围测得为48 dB,覆盖幅度为20μV至5 mV的信号。该放大器的1.2V电源消耗23.5μW的功率,最大增益为69.8 dB。在0.1 Hz至20 kHz范围内,模拟输入参考噪声为5.3μV。

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