A power-area-efficient, 3-band, 2-RX MIMO, TD-LTE receiver with direct-coupled ADC

摘要

In this work, a power-area-efficient, 3-band, 2-RX MIMO, and TD-LTE (backward compatible with the HSPA+, HSUPA, HSDPA, and TD-SCDMA) CMOS receiver is presented and implemented in 0.13-m CMOS technology. The continuous-time delta-sigma A/D converters (CT sigma ADCs) are directly coupled to the outputs of the transimpedance amplifiers, eliminating the need of analog anti-aliasing filters between RX front-end and ADCs in conventional structures. The strong adjacent channel interference without low-pass filter attenuation is handled by proper gain control. A low-power small-area solution for excess loop delay compensation is implemented in the CT sigma ADC. At 20MHz bandwidth, the CT sigma ADC achieves 66dB dynamic range and 3.5dB RX chip noise figure is measured. A maximum of 2.4dB signal-to-noise ratio degradation is measured in all the adjacent channel selectivity (ACS) and blocking tests, demonstrating the effectiveness of the strategy against the low-pass filter removal from the conventional architecture. The receiver dissipates a maximum of 171mW at 2-RX MIMO mode. To our best knowledge, it is the first research paper on the design of fully integrated commercial TD-LTE receiver. Copyright (c) 2014 John Wiley & Sons, Ltd.