机译:一种统一的电路元件自主和非自治模型的统一方法
Warsaw Univ Technol Inst Elect Syst Fac Elect & Informat Technol Nowowiejska 15-19 PL-00665 Warsaw Poland;
analog circuit simulation; autonomous and nonautonomous models; circuit theory; current conveyors; nullator-norator models; unistor graph;