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On fixed-polynomial size circuit lower bounds for uniform polynomials in the sense of Valiant

机译:在固定多项式大小的电路上,从Valiant的角度看齐次多项式的下界

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We consider the problem of fixed-polynomial lower bounds on the size of arithmetic circuits computing uniform families of polynomials. Assuming the generalised Riemann hypothesis (GRH), we show that for all k, there exist polynomials with coefficients in MA having no arithmetic circuits of size O(n~k) over C (allowing any complex constant). We also build a family of polynomials that can be evaluated in AM having no arithmetic circuits of size O (n~k). Then we investigate the link between fixed-polynomial size circuit bounds in the Boolean and arithmetic settings. In characteristic zero, it is proved that NP is contained in / size(n~k), or MA c slze(n~k), or NP = MA imply lower bounds on the circuit size of uniform polynomials in n variables from the class VNP over C, assuming GRH. In positive characteristic p, uniform polynomials in VNP have circuits of fixed-polynomial size if and only if both VP = VNP over F_p and Mod_pP has circuits of fixed-polynomial size.
机译:我们考虑了计算多项式统一族的算术电路的大小的固定多项式下界问题。假设广义黎曼假设(GRH),我们表明对于所有k,在MA中都存在具有系数的多项式,在C上没有大小为O(n〜k)的算术电路(允许任何复数常数)。我们还建立了一个多项式族,可以在没有大小为O(n〜k)的算术电路的AM中进行评估。然后,我们研究布尔值和算法设置中固定多项式大小的电路范围之间的联系。在特征零中,证明NP包含在/ size(n〜k)或MA c slze(n〜k)中,或者NP = MA隐含了该类n个变量中均匀多项式的电路大小的下限假设GRH,则VNP高于C。在正特性p中,当且仅当VP = VNP over F_p和Mod_pP均具有固定多项式大小的电路时,VNP中的均匀多项式才具有固定多项式大小的电路。

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