Three-Dimensional Space-Vector Modulation to Reduce Common-Mode Voltage for Multilevel Inverter

摘要

In this paper, an approach to reduce common-mode voltage (CMV) at the output of multilevel inverter using 3-D space-vector modulation (SVM) is proposed. The 3-D SVM is superset of the traditional 2-D SVM, and thus, it inherits all the merits of traditional 2-D. A simple technique for the selection of switching states to constitute the reference vector is proposed here. The computational cost of the proposed technique is independent of voltage levels of inverter. This technique is easy to implement online in digital controller. The tradeoff between quality of output voltage and CMV is achieved in this paper. This paper realizes the implementation of 3-D SVM to reduce the CMV using a five-level diode-clamped inverter for a three-phase induction motor. Experimental and simulation results demonstrate the feasibility of the proposed technique.