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首页> 外文期刊>IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences >A Fractional Phase Interpolator Using Two-Step Integration for Frequency Multiplication and Direct Digital Synthesis
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A Fractional Phase Interpolator Using Two-Step Integration for Frequency Multiplication and Direct Digital Synthesis

机译:使用两步积分进行倍频和直接数字合成的分数相位内插器

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We propose a new phase interpolator that provides precise fractional phase pulses without the need to adjust circuit constants. The variable phases are produced by detecting the coincidence of two voltages, the ramp wave and the threshold voltage. The new phase interpolator can keep the same ramp wave slope and the same threshold voltage for different output phases. This significantly reduces the power dissipation of the voltage comparator. This phase interpolator can be applied to various timing circuits and clock generators, such as frequency multipliers and direct digital synthesizers. We present a novel frequency doubler, a novel frequency tripler, a direct digital synthesizer (DDS), and a novel wideband DDS (WDDS) as applications of our new phase interpolator, which uses 0.35-mm CMOS process technology. Experimental results confirm the functionality of the new phase interpolator. An 8-bit complete DDS IC dissipates only 2.1 mA at a 50-MHz clock rate and a supply voltage of 2.8 V.
机译:我们提出了一种新的相位内插器,它无需调整电路常数即可提供精确的分数相位脉冲。通过检测两个电压(斜坡波和阈值电压)的一致来产生可变相位。新的相位内插器可以针对不同的输出相位保持相同的斜波斜率和相同的阈值电压。这大大降低了电压比较器的功耗。该相位内插器可以应用于各种定时电路和时钟发生器,例如倍频器和直接数字合成器。我们介绍了一种新型倍频器,新型倍频器,直接数字合成器(DDS)和新型宽带DDS(WDDS),作为使用0.35毫米CMOS工艺技术的新型相位内插器的应用。实验结果证实了新型相位内插器的功能。一个8位完整DDS IC在50MHz时钟速率和2.8V电源电压下仅耗散2.1mA电流。

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